|
|
Specifications
- Main Board houses the Main Test Vector Processor and Interface to the Host PCI card.
- Interface to the device specific Load Board through 256 Pogo pins.
Main Test Vector Processor
- Test Vector Instruction Sequence RAM of 4K by 64 bits.
- Single Burst sequence of 4K patterns.
- Interface to the device specific Load Board through 256 pin Pogo pins.
- Programmable pattern duration.
- Two programmable event pulses.
- Two timing strobes for sampling receiver data.
- Unconditional loops.
- Conditional loops for event synchronization.
- On the Fly programmable basic timing units and pattern duration.
- Data formats supported are NR, RZ, RO, SBC and RZ.
- Special purpose Interface Wave Generation or as arbitrary wave form generator.
Each DPPS has two independent programmable power supply for the device under test.
Force Voltage – Measure Current Mode
- Supply programmable from –12V to +12V
- RAM based DPPS for Force voltage and measure current with 4k depth and time base programmable
- 4 Current Measure Ranges.
Next
Each PMU has two independent channels for FVMC, FCMV and Waveform Digitizer at 20Msps.
Each PMU one High Voltage / High Current channel for FVMC and FCMV.
- 2 ranges for force voltage / measure voltage;
- 6 ranges for Measure Current / force current mode;
Each Digital Card has 8 channels with 4K X 8 RAM.
- Each driver can drive Logic One / Zero / Hi-Z state
- Logic levels are programmable in 10mV steps
- Each driver can choose its drive levels from either one of the preprogrammed pallets.
- Each Pin Receiver has programmable upper and lower thresholds.
- Compare & acquisition RAMs are provided for both hardware compare and for reading fault data for FA.
- Pull-up, Pull-Down, Both or None are user programmable for each pin.
- Digital Highway 0 for measurement of frequency.
- Maximum frequency measurement is 50MHz.
- Pulse width measurement.
- Measurement of time between two events.
- Time resolution is 0.833ns. Optional 0.4165ns
- Optional Jitter measurements.
- Optional Load Board user logic interface to PCI
- Opto Coupler handler interface
- Generic Test Program Development Platform
- Engineering mode / Production mode with passwords.
- Extensive data log / Binning
- Programmable low yield threshold.
- Lab View based Application Software
|
|
|